Abstract—This paper introduces an Ultra Thin Body Silicon Over Insulator Tunneling Field Effect Transistor structure, which shows excellent device characteristics using a CMOS compatible fabrication process. This fabricated TFET structure shows ≤40 mV Sub-threshold Swing (SS), on-state/ off-state current ratio ≥108 and a scaled down Supply Voltage 0.6 Volt at 32nm gate length. The work also includes a detail design parameters study on the on-state/ off-state current ratio and sub-threshold swing. The result is particularly promising for low-power application of the device.

Index Terms—SOITFET, UTBTFET, band-to-band tunnelling, sub-threshold swing, TCAD.

Partha Sarathi Gupta, Sayan Kanungo, Hafizur Rahaman and Kunal Sinha are with the Bengal Engineering and Science University, Shibpur.
Partha Sarathi Dasgupta is with the Indian Institute of Management, Calcutta.


Cite: Partha Sarathi Gupta, Sayan Kanungo, Hafizur Rahaman, Kunal Sinha, and Partha Sarathi Dasgupta, "An Extremely Low Sub-Threshold Swing UTB SOI Tunnel-FET Structure Suitable for Low-Power Applications," International Journal of Applied Physics and Mathematics  vol. 2, no. 4, pp. 240-243, 2012.